IEEE

FPGA Implementation of an Improved OMP for Compressive Sensing Reconstruction

Abstract: This article proposes an improved orthogonal matching pursuit (OMP) algorithm and its implementation with Xilinx Vivado high-level synthesis (HLS). We use the Gram-Schmidt orthogonalization ...
IEEE

High-Level Annotation of Routing Congestion for Xilinx Vivado HLS Designs

Abstract: Ever since transistor cost stopped decreasing, customized programmable platforms, such as field-programmable gate arrays (FPGAs), became a major way to improve software execution performance ...
GitHub

A Tcl-based CAD Tool Framework for Xilinx's Vivado Design Suite

Tincr is a suite of Tcl libraries written for Xilinx's Vivado IDE. The goal of Tincr is to enable users to build their own CAD tools on top of Vivado. It facilitates this through two primary ...
GitHub

Rocket Chip on Zynq FPGAs

Those looking for an FPGA prototype of Rocket Chip should checkout SiFive’s Freedom platform. Those looking for an FPGA-accelerated simulation environment (for obtaining cycle-accurate performance ...
Yahoo Finance

Advanced Micro Devices, Inc. (AMD)

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