Abstract: We discuss a 14 bit 1 GS/s RF sampling pipelined ADC that utilizes correlation-based background calibration to correct the inter-stage gain, settling and memory errors. To improve the ...
Abstract: We discuss a 12-b 18-GS/s analog-to-digital converter (ADC) implemented in 16-nm FinFET process. The ADC is composed of an integrated high-speed track-and-hold amplifier (THA) driving up to ...
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