GitHub

A minimal 8-bit processor using a Bit Serial Architecture

In a quest for a truly minimal computer, that can be built from readily available 74HC components on a low cost pcb, I have settled on a novel 8-bit, bit-serial architecture - a design that I call ...
IEEE

Design and Implementation of a Low-Power 4-Bit Synchronous Up Counter Using Gate-Diffusion Input Technology

Abstract: Power efficiency together with speed and design area optimization represent essential factors which matter significantly for contemporary digital circuit design activities including embedded ...
IEEE

A 65nm Compute-In-Memory 7T SRAM Macro Supporting 4-bit Multiply and Accumulate Operation by Employing Charge Sharing

Abstract: In this work, we propose an energy-efficient 64$\times $ 64 compute-in-memory (CIM) SRAM macro using a 7T bit-cell in 65nm CMOS UMC PDK. It supports 4-bit inputs, 4-bit weights & 4-bit ...
Microsoft

BitNet: Scaling 1-bit Transformers for Large Language Models

The increasing size of large language models has posed challenges for deployment and raised concerns about environmental impact due to high energy consumption. In this work, we introduce BitNet, a ...