EDN

FROM EDN EUROPE: PLD architecture bridges CPLD, FPGA applications

Lattice Semiconductor's newest series of programmable logic devices will suit applications for which designers previously specified either the largest CPLDs, or parts from the low end of one of the ...
EDN

New programmable device family combines CPLD and FPGA features

In its third major and field-programmable gate array (FPGA) announcement in the last 12 months, Lattice Semiconductor Corp. has introduced MachXO, a new product family that combines the key features ...
Electronic Design

PLD Family Bridges FPGA And CPLD Needs

These programmable-logic devices combine CPLD flash configurability with an FPGA lookup-table architecture for lower-cost, logic-intensive designs. Applications traditionally supported by high-density ...
Embedded

Leveraging FPGA and CPLD digital logic to implement analog to digital converters

Designers of digital systems are familiar with implementing the 'leftovers' of their digital design by using FPGAs and CPLDs to glue together various processors, memories, and standard function ...
Electronic Design

Demo Platform Compares FPGA/CPLD Power

If you've ever wondered which FPGA/CPLD vendor offers the best performance at the lowest power, consider QuickLogic's Power Comparison Resource Package. Along with a corresponding Web site, it ...
Nature

High-Performance Sorting Algorithms and Architectures Using FPGA

Field-programmable gate arrays (FPGAs) offer a unique platform for the implementation of high-performance sorting algorithms by combining inherent parallelism with customisable hardware architectures.